﻿<?xml version="1.0" encoding="utf-8"?><rss version="2.0" xmlns:book="http://www.netyi.net"><channel><title>系统分析与设计_计算机基础理论_计算机类_最新资料_得益网</title><link>http://www.netyi.net/Category/108</link><description>系统分析与设计_计算机基础理论_计算机类_最新资料_得益网</description><copyright /><generator>得益网</generator>
<item><title>上海交大2007年微机原理(27完结)</title><link>http://www.netyi.net/training/6b73f590-1886-40b1-9174-5a92ff4d5c47</link><description>上海交大2007年微机原理(27完结),交大精品课程,高清晰,无杂音.</description><pubDate>2008-08-20 11:21:55</pubDate></item>
<item><title>上海交大2007年微机原理(23)</title><link>http://www.netyi.net/training/67b410ab-bb1d-4564-802e-c736f00d88c9</link><description>上海交大2007年微机原理(23) </description><pubDate>2008-08-20 10:55:05</pubDate></item>
<item><title>上海交大2007年微机原理(26)</title><link>http://www.netyi.net/training/2994109c-32f0-45ab-a025-d72b4ad30347</link><description>上海交大2007年微机原理(26),共27集,每集60分钟-120分钟.</description><pubDate>2008-08-19 13:48:00</pubDate></item>
<item><title>上海交大2007年微机原理(25)</title><link>http://www.netyi.net/training/c2876d9f-20ea-41f4-a374-a4703e5a5459</link><description>上海交大2007年微机原理(25)</description><pubDate>2008-08-19 13:31:06</pubDate></item>
<item><title>上海交大2007年微机原理(24)</title><link>http://www.netyi.net/training/daed847f-703d-4469-8763-13360befff59</link><description>上海交大2007年微机原理(24)</description><pubDate>2008-08-19 13:22:10</pubDate></item>
<item><title>上海交大2007年微机原理(22)</title><link>http://www.netyi.net/training/a32697ee-c4b1-441d-97c7-f2a3ad7b4432</link><description>上海交大2007年微机原理(22)</description><pubDate>2008-08-19 13:06:39</pubDate></item>
<item><title>上海交大2007年微机原理(21)</title><link>http://www.netyi.net/training/64d6eeee-758d-48e5-a153-e33b04977542</link><description>上海交大2007年微机原理(21)</description><pubDate>2008-08-19 09:36:49</pubDate></item>
<item><title>上海交大2007年微机原理(20)</title><link>http://www.netyi.net/training/3dd81ee4-177a-4241-853e-8253ad1bdff9</link><description>上海交大2007年微机原理(20)</description><pubDate>2008-08-19 09:18:30</pubDate></item>
<item><title>上海交大2007年微机原理(19)</title><link>http://www.netyi.net/training/b0da97b8-66cd-44e8-b38f-1162a84c4d21</link><description>上海交大2007年微机原理(19)</description><pubDate>2008-08-18 20:01:49</pubDate></item>
<item><title>上海交大2007年微机原理(18)</title><link>http://www.netyi.net/training/9d00c7cc-da99-40bf-be40-5556de0efc94</link><description>上海交大2007年微机原理(18)</description><pubDate>2008-08-18 19:45:38</pubDate></item>
<item><title>上海交大2007年微机原理(17)</title><link>http://www.netyi.net/training/352f10b0-65e5-4ec2-b822-fbbc05bf1c44</link><description>上海交大2007年微机原理(17)</description><pubDate>2008-08-18 16:56:47</pubDate></item>
<item><title>上海交大2007年微机原理(16)</title><link>http://www.netyi.net/training/606b956d-a153-4f1e-8671-ffc1da47a0fe</link><description>上海交大2007年微机原理(15)</description><pubDate>2008-08-18 16:35:25</pubDate></item>
<item><title>上海交大2007年微机原理(15)</title><link>http://www.netyi.net/training/0bc2e2d5-4aaf-449e-8510-d877231eb88d</link><description>上海交大2007年微机原理(15)</description><pubDate>2008-08-18 16:18:23</pubDate></item>
<item><title>上海交大2007年微机原理(14)</title><link>http://www.netyi.net/training/8737d4c3-436b-4f12-a91b-af8e332413af</link><description>上海交大2007年微机原理(14),交大精品课程.</description><pubDate>2008-08-18 16:05:25</pubDate></item>
<item><title>上海交大2007年微机原理(13)</title><link>http://www.netyi.net/training/07d76662-9909-496f-bca0-a36f44063f5f</link><description>上海交大2007年微机原理(13)，精品课程。</description><pubDate>2008-08-18 15:53:37</pubDate></item>
<item><title>上海交大2007年微机原理(12)</title><link>http://www.netyi.net/training/d09520e1-42d9-4562-9997-72afb2bfd980</link><description>上海交大2007年微机原理(12)</description><pubDate>2008-08-18 15:41:49</pubDate></item>
<item><title>上海交大2007年微机原理(11)</title><link>http://www.netyi.net/training/9dae37cc-4654-4b08-944c-20d501a4b0e8</link><description>上海交大2007年微机原理(11),上传的文件为rar格式.</description><pubDate>2008-08-15 00:03:25</pubDate></item>
<item><title>上海交大2007年微机原理(10)</title><link>http://www.netyi.net/training/f8a84b6e-7fa0-4831-bf46-d812cac38717</link><description>上海交大2007年微机原理(10),上传的资料为rar格式,解压后40多Mb.</description><pubDate>2008-08-14 23:52:02</pubDate></item>
<item><title>上海交大2007年微机原理(9)</title><link>http://www.netyi.net/training/8f00451e-9729-4e9d-ad86-610cff13eb66</link><description>上海交大2007年微机原理(9)</description><pubDate>2008-08-14 23:42:33</pubDate></item>
<item><title>上海交大2007年微机原理(8)</title><link>http://www.netyi.net/training/99097a13-0940-4050-ba37-0534cae4152e</link><description>交大精品课程,超清晰.</description><pubDate>2008-08-14 09:44:27</pubDate></item>
<item><title>上海交大微机原理(7)</title><link>http://www.netyi.net/training/97db2abb-eef8-423a-923f-7894aa8b754f</link><description>微机原理一直被全国高校，包括清华北大，认为是很有难度的计算机专业课程，上海交大的王春香老师却不这么认为，她带的班级，也就是2006界计算机系,在她诙谐幽默而不失专业性的讲解下，全班期末成绩全过80，班级平均成绩过90！王春香老师很早就说，微机原理非常简单，担心同学们稍微认真听课后，都考100分怎么办？也正因为这个教学奇迹，王春香老师的微机原理课程被评为交大精品课程。本套视频课程再现了王春香老师当年教学的点滴风采。老师不仅课讲的精彩幽默，声音也很悦耳。</description><pubDate>2008-08-13 21:47:34</pubDate></item>
<item><title>Architecture of Computing Systems - ARCS 2008</title><link>http://www.netyi.net/training/b64f32fa-02f9-4cdd-a23d-a6076f64020b</link><description>Editorial Reviews&lt;br/&gt;&lt;br/&gt;Product Description&lt;br/&gt;&lt;br/&gt;This book constitutes the refereed proceedings of the 21st International Conference on Architecture of Computing Systems, ARCS 2008, held in Dresden, Germany, in February 2008.&lt;br/&gt;&lt;br/&gt;The 19 revised full papers presented together with 2 keynote papers were carefully reviewed and selected from 47 submissions. The papers cover a wide spectrum reaching from pre-fabrication adaptation of architectural templates to dynamic run-time adaptation of deployed systems with special focus on adaptivity and adaptive system architectures. The papers are organized in topical sections on hardware design, pervasive computing, network processors and memory management, reconfigurable hardware, real-time architectures, organic computing, and computer architecture.&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;Preface&lt;br/&gt;&lt;br/&gt;The ARCS series of conferences has over 30 years of tradition in reporting top&lt;br/&gt;notch results in computer architecture and operating systems research. It is organized&lt;br/&gt;by the special interest group on “Computer and System Architecture” of GI&lt;br/&gt;(Gesellschaft f&amp;#168;ur Informatik e.V.) and ITG (Informationstechnische Gesellschaft&lt;br/&gt;im VDE - Information Technology Society).&lt;br/&gt;In 2008, ARCS was hosted by the Technical University of Dresden, which has&lt;br/&gt;one of the leading information technology schools in Europe. This year’s special&lt;br/&gt;focus was on adaptivity and adaptive system architectures. A wide spectrum was&lt;br/&gt;covered from pre-fabrication adaptation of architectural templates to dynamic&lt;br/&gt;run-time adaptation of deployed systems. Like the previous conferences in this&lt;br/&gt;series, this year’s event constituted an important forum for the presentation of&lt;br/&gt;computer architecture research.&lt;br/&gt;The call for papers resulted in a total of 47 submissions from around the&lt;br/&gt;world. Every submission was reviewed by three members of the program committee&lt;br/&gt;or additional reviewers. The program committee decided to accept 19&lt;br/&gt;papers, which were arranged into seven sessions with the result of a strong program.&lt;br/&gt;The two keynote talks by Theo Ungerer of the University of Augsburg and&lt;br/&gt;Chris Schl&amp;#168;ager of AMD Dresden focused our attention on the “Grand Challenges&lt;br/&gt;of Computer Engineering” and on the “Impact of Operating Systems on Modern&lt;br/&gt;CPU Designs (and Vice Versa)”.&lt;br/&gt;The organizers gratefully acknowledge the support of ACM, IEEE, IFIP&lt;br/&gt;TC10, CEPIS, and EUREL.&lt;br/&gt;We would like to thank all those who contributed to the success of this conference,&lt;br/&gt;in particular the members of the program committee and the additional&lt;br/&gt;referees for carefully reviewing the contributions and selecting a high-quality&lt;br/&gt;program. Our Workshop and Tutorial Chair Andreas Koch did a perfect job in&lt;br/&gt;organizing the tutorials and coordinating the workshops. Our special thanks go&lt;br/&gt;to the members of the organizing committee for their numerous contributions&lt;br/&gt;as well as to Thomas B. Preu?er for setting up the conference software and for&lt;br/&gt;designing and maintaining the conference Web site. We would also like to thank&lt;br/&gt;Julian Wolf for his thorough preparation of this volume.&lt;br/&gt;We hope that all of the participants enjoyed a successful conference, made a&lt;br/&gt;lot of new contacts, engaged in fruitful discussions, and had a pleasant stay in&lt;br/&gt;Dresden.&lt;br/&gt;December 2007 Uwe Brinkschulte&lt;br/&gt;Theo Ungerer&lt;br/&gt;Christian Hochberger&lt;br/&gt;Rainer G. Spallek&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;Table of Contents&lt;br/&gt;Invited Program&lt;br/&gt;Keynote: Grand Challenges of Computer Engineering . . . . . . . . . . . . . . . . . 3&lt;br/&gt;Theo Ungerer&lt;br/&gt;Keynote: The Impact of Operating Systems on Modern CPU Designs&lt;br/&gt;(and Vice Versa) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5&lt;br/&gt;Chris Schl╝ger&lt;br/&gt;Part I Hardware Design&lt;br/&gt;System Level Simulation of Autonomic SoCs with TAPES. . . . . . . . . . . . . 9&lt;br/&gt;Andreas Lankes, Thomas Wild, and Johannes Zeppenfeld&lt;br/&gt;Topology-Aware Replica Placement in Fault-Tolerant Embedded&lt;br/&gt;Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23&lt;br/&gt;Thilo Streichert, Michael Gla? Rolf Wanka, Christian Haubelt, and&lt;br/&gt;J╱rgen Teich&lt;br/&gt;Design of Gate Array Circuits Using Evolutionary Algorithms . . . . . . . . . 38&lt;br/&gt;Peter Bungert, Sanaz Mostaghim, Hartmut Schmeck, and&lt;br/&gt;J╱rgen Branke&lt;br/&gt;Part II Pervasive Computing&lt;br/&gt;Direct Backtracking: An Advanced Adaptation Algorithm for Pervasive&lt;br/&gt;Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53&lt;br/&gt;Stephan Schuhmann, Klaus Herrmann, and Kurt Rothermel&lt;br/&gt;Intelligent Vehicle Handling: Steering and Body Postures While&lt;br/&gt;Cornering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68&lt;br/&gt;Andreas Riener, Alois Ferscha, and Michael Matscheko&lt;br/&gt;Part III Network Processors and Memory&lt;br/&gt;Management&lt;br/&gt;A Hardware Packet Re-Sequencer Unit for Network Processors. . . . . . . . . 85&lt;br/&gt;Michael Meitinger, Rainer Ohlendorf, Thomas Wild, and&lt;br/&gt;Andreas Herkersdorf&lt;br/&gt;Self-aware Memory: Managing Distributed Memory in an Autonomous&lt;br/&gt;Multi-master Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98&lt;br/&gt;Rainer Buchty, Oliver Mattes, and Wolfgang Karl&lt;br/&gt;Part IV Reconfigurable Hardware&lt;br/&gt;Dynamic Reconfiguration of FlexRay Schedules for Response Time&lt;br/&gt;Reduction in Asynchronous Fault-Tolerant Networks . . . . . . . . . . . . . . . . . 117&lt;br/&gt;Robert Brendle, Thilo Streichert, Dirk Koch, Christian Haubelt, and&lt;br/&gt;J&amp;#168;urgen Teich&lt;br/&gt;Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order&lt;br/&gt;Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130&lt;br/&gt;Joachim Keinert, Christian Haubelt, and J&amp;#168;urgen Teich&lt;br/&gt;A Novel Routing Architecture for Field-Programmable Gate-Arrays . . . . 144&lt;br/&gt;Alexander Danilin, Martijn Bennebroek, and Sergei Sawitzki&lt;br/&gt;Part V Real-Time Architectures&lt;br/&gt;A Predictable Simultaneous Multithreading Scheme for Hard&lt;br/&gt;Real-Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161&lt;br/&gt;Jonathan Barre, Christine Rochange, and Pascal Sainrat&lt;br/&gt;Soft Real-Time Scheduling on SMT Processors with Explicit Resource&lt;br/&gt;Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173&lt;br/&gt;Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, and&lt;br/&gt;Mateo Valero&lt;br/&gt;A Hardware/Software Codesign of a Co-processor for Real-Time&lt;br/&gt;Hyperelliptic Curve Cryptography on a Spartan3 FPGA . . . . . . . . . . . . . . 188&lt;br/&gt;Alexander Klimm, Oliver Sander, J&amp;#168;urgen Becker, and&lt;br/&gt;Sylvain Subileau&lt;br/&gt;Part VI Organic Computing&lt;br/&gt;A Reference Architecture for Self-organizing Service-Oriented&lt;br/&gt;Computing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205&lt;br/&gt;Lei Liu, Stefan Thanheiser, and Hartmut Schmeck&lt;br/&gt;Towards Self-organising Smart Camera Systems . . . . . . . . . . . . . . . . . . . . . . 220&lt;br/&gt;Martin Hoffmann, J&amp;#168;org H&amp;#168;ahner, and Christian M&amp;#168;uller-Schloer&lt;br/&gt;Using Organic Computing to Control Bunching Effects . . . . . . . . . . . . . . . 232&lt;br/&gt;Oliver Ribock, Urban Richter, and Hartmut Schmeck&lt;br/&gt;Part VII Computer Architecture&lt;br/&gt;A Generic Network Interface Architecture for a Networked Processor&lt;br/&gt;Array (NePA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247&lt;br/&gt;Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, and&lt;br/&gt;Nader Bagherzadeh&lt;br/&gt;Constructing Optimal XOR-Functions to Minimize Cache Conflict&lt;br/&gt;Misses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261&lt;br/&gt;Hans Vandierendonck and Koen De Bosschere&lt;br/&gt;Potentials of Branch Predictors: From Entropy Viewpoints . . . . . . . . . . . . 273&lt;br/&gt;Takashi Yokota, Kanemitsu Ootsu, and Takanobu Baba&lt;br/&gt;Author Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287</description><pubDate>2008-06-04 22:52:26</pubDate></item>
<item><title>嵌入式开发课件【上海交大】</title><link>http://www.netyi.net/training/bf36211b-3831-4dab-8bfd-794f712ce404</link><description>上海交大的嵌入式课程课件：&lt;br/&gt;1－嵌入式系统与桌面系统&lt;br/&gt;2a－嵌入式系统介绍&lt;br/&gt;2b－嵌入式系统介绍软件部分&lt;br/&gt;2c－嵌入式系统介绍硬件部分&lt;br/&gt;3a－嵌入式系统设计（常见嵌入式硬件）&lt;br/&gt;3b－嵌入式系统设计（软硬件协同划分技术）&lt;br/&gt;3c－嵌入式系统设计（软硬件协同设计技术）&lt;br/&gt;3d－嵌入式系统设计（系统级设计）&lt;br/&gt;4a－Linux嵌入式系统设计&lt;br/&gt;4b－嵌入式系统设计（MP3播放器设计）&lt;br/&gt;4c－嵌入式系统设计U-BOOT&lt;br/&gt;4d－嵌入式系统设计（网络存储设计）&lt;br/&gt;5-嵌入式系统－说明&lt;br/&gt;嵌入式系统－作业1&lt;br/&gt;嵌入式系统－作业2</description><pubDate>2008-04-29 23:52:53</pubDate></item>
<item><title>linkers&amp;loaders 中文版</title><link>http://www.netyi.net/training/05c4942b-ceb2-4966-bd07-e11f304668de</link><description>了解连接器和加载器不可缺少的资料:&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;几乎从有计算机以来，链接器和加载器就是软件开发工具包中的一部分，因为他们是&lt;br/&gt;允许使用模块（而不是一个单独的大文件）来构建程序的关键工具。&lt;br/&gt;早在1947年，程序员们就开始使用原始的加载器：将程序的例程存储在多个不同的磁&lt;br/&gt;带上，并将他们合并、重定位为一个程序。在上世纪60年代早期，这些加载器就已经发展&lt;br/&gt;的相当完善了。由于那时内存很贵且容量有限，计算机的速度（以今天的标准）很慢，为了&lt;br/&gt;创建复杂的内存覆盖策略（将大容量的程序加在到少量的内存中），以及重复编辑之前链接&lt;br/&gt;过的文件（节省重新创建程序的时间），这些链接器都包含了很多复杂的特性。&lt;br/&gt;上世纪70到80年代，链接技术几乎没有什么进展。链接器趋向于更加简单，虚拟内存&lt;br/&gt;技术将应用程序和覆盖机制中的大多数存储管理工作都转移给了操作系统，越来越快的计算&lt;br/&gt;机和越来越大的磁盘也使得重新链接一个程序或替换个别模块比仅仅链接改变过的地方更加&lt;br/&gt;容易了。从上世纪90年代起，由于增加了诸如动态链接共享库和C++的诸多现代特性，链接&lt;br/&gt;器又开始变得复杂起来。像IA64这样具有长指令字和编译时访存调度等特性的先进处理器&lt;br/&gt;架构，也需要将一些新的特性加入到链接器中以确保在被链接的程序中可以满足代码的这些&lt;br/&gt;复杂需求。&lt;br/&gt;Table of Contents&lt;br/&gt;Chapter 0: Front Matter ........................................................ 1&lt;br/&gt;Dedication .............................................................................................. 1&lt;br/&gt;Introduction ............................................................................................ 1&lt;br/&gt;Who is this book for? ......................................................................... 2&lt;br/&gt;Chapter summaries ............................................................................. 3&lt;br/&gt;The project ......................................................................................... 4&lt;br/&gt;Acknowledgements ............................................................................ 5&lt;br/&gt;Contact us ........................................................................................... 6&lt;br/&gt;Chapter 1: Linking and Loading ........................................... 7&lt;br/&gt;What do linkers and loaders do? ............................................................ 7&lt;br/&gt;Address binding: a historical perspective .............................................. 7&lt;br/&gt;Linking vs. loading .............................................................................. 10&lt;br/&gt;Two-pass linking .............................................................................. 12&lt;br/&gt;Object code libraries ........................................................................ 15&lt;br/&gt;Relocation and code modification .................................................... 17&lt;br/&gt;Compiler Drivers .................................................................................. 18&lt;br/&gt;Linker command languages ............................................................. 19&lt;br/&gt;Linking: a true-life example ................................................................. 20&lt;br/&gt;Exercises .............................................................................................. 25&lt;br/&gt;Chapter 2: Architectural Issues ........................................... 27&lt;br/&gt;Application Binary Interfaces .............................................................. 27&lt;br/&gt;Memory Addresses .............................................................................. 28&lt;br/&gt;Byte Order and Alignment ............................................................... 28&lt;br/&gt;Address formation ................................................................................ 30&lt;br/&gt;Instruction formats ............................................................................... 31&lt;br/&gt;Procedure Calls and Addressability ..................................................... 32&lt;br/&gt;Procedure calls ................................................................................. 33&lt;br/&gt;2 Table of Contents&lt;br/&gt;Data and instruction references ............................................................ 36&lt;br/&gt;IBM 370 ........................................................................................... 37&lt;br/&gt;SPARC ............................................................................................. 40&lt;br/&gt;SPARC V8 ................................................................................... 40&lt;br/&gt;SPARC V9 ................................................................................... 42&lt;br/&gt;Intel x86 ........................................................................................... 43&lt;br/&gt;Paging and Virtual Memory ................................................................. 45&lt;br/&gt;The program address space .............................................................. 48&lt;br/&gt;Mapped files ..................................................................................... 49&lt;br/&gt;Shared libraries and programs ......................................................... 51&lt;br/&gt;Position-independent code ............................................................... 51&lt;br/&gt;Intel 386 Segmentation ........................................................................ 53&lt;br/&gt;Embedded architectures ....................................................................... 55&lt;br/&gt;Address space quirks ........................................................................ 56&lt;br/&gt;Non-uniform memory ...................................................................... 56&lt;br/&gt;Memory alignment ........................................................................... 57&lt;br/&gt;Exercises .............................................................................................. 57&lt;br/&gt;Chapter 3: Object Files ........................................................ 59&lt;br/&gt;What goes into an object file? .............................................................. 59&lt;br/&gt;Designing an object format .............................................................. 60&lt;br/&gt;The null object format: MS-DOS .COM files ...................................... 61&lt;br/&gt;Code sections: Unix a.out files ............................................................. 61&lt;br/&gt;a.out headers .................................................................................... 64&lt;br/&gt;Interactions with virtual memory ..................................................... 65&lt;br/&gt;Relocation: MS-DOS EXE files ........................................................... 72&lt;br/&gt;Symbols and relocation ........................................................................ 74&lt;br/&gt;Relocatable a.out .................................................................................. 75&lt;br/&gt;Relocation entries ............................................................................. 78&lt;br/&gt;Symbols and strings ......................................................................... 80&lt;br/&gt;a.out summary .................................................................................. 82&lt;br/&gt;Unix ELF ............................................................................................. 82&lt;br/&gt;Relocatable files ............................................................................... 85&lt;br/&gt;ELF executable files ......................................................................... 92&lt;br/&gt;ELF summary ................................................................................... 94&lt;br/&gt;Table of Contents 3&lt;br/&gt;IBM 360 object format ......................................................................... 94&lt;br/&gt;ESD records ..................................................................................... 95&lt;br/&gt;TXT records ..................................................................................... 97&lt;br/&gt;RLD records ..................................................................................... 97&lt;br/&gt;END records ..................................................................................... 98&lt;br/&gt;Summary .......................................................................................... 98&lt;br/&gt;Microsoft Portable Executable format ................................................. 99&lt;br/&gt;PE special sections ......................................................................... 105&lt;br/&gt;Running a PE executable ............................................................... 107&lt;br/&gt;PE and COFF ................................................................................. 107&lt;br/&gt;PE summary ................................................................................... 108&lt;br/&gt;Intel/Microsoft OMF files .................................................................. 108&lt;br/&gt;OMF records .................................................................................. 110&lt;br/&gt;Details of an OMF file ................................................................... 111&lt;br/&gt;Summary of OMF .......................................................................... 114&lt;br/&gt;Comparison of object formats ............................................................ 114&lt;br/&gt;Project ................................................................................................ 115&lt;br/&gt;Exercises ............................................................................................ 117&lt;br/&gt;Chapter 4: Storage allocation ............................................ 119&lt;br/&gt;Segments and addresses ..................................................................... 119&lt;br/&gt;Simple storage layout ......................................................................... 120&lt;br/&gt;Multiple segment types ...................................................................... 121&lt;br/&gt;Segment and page alignment ............................................................. 124&lt;br/&gt;Common blocks and other special segments ..................................... 125&lt;br/&gt;Common ......................................................................................... 125&lt;br/&gt;C++ duplicate removal ................................................................... 127&lt;br/&gt;Initializers and finalizers ................................................................ 130&lt;br/&gt;IBM pseudo-registers ..................................................................... 131&lt;br/&gt;Special tables ................................................................................. 134&lt;br/&gt;X86 segmented storage allocation ................................................. 134&lt;br/&gt;Linker control scripts ......................................................................... 136&lt;br/&gt;Embedded system storage allocation ................................................. 138&lt;br/&gt;Storage allocation in practice ............................................................. 138&lt;br/&gt;Storage allocation in Unix a.out linkers ......................................... 139&lt;br/&gt;4 Table of Contents&lt;br/&gt;Storage allocation in ELF .............................................................. 141&lt;br/&gt;Storage allocation in Windows linkers .......................................... 144&lt;br/&gt;Exercises ............................................................................................ 146&lt;br/&gt;Project ................................................................................................ 147&lt;br/&gt;Chapter 5: Symbol management ....................................... 149&lt;br/&gt;Binding and name resolution ............................................................. 149&lt;br/&gt;Symbol table formats ......................................................................... 150&lt;br/&gt;Module tables ................................................................................. 153&lt;br/&gt;Global symbol table ....................................................................... 154&lt;br/&gt;Symbol resolution .......................................................................... 157&lt;br/&gt;Special symbols ............................................................................. 158&lt;br/&gt;Name mangling .................................................................................. 158&lt;br/&gt;Simple C and Fortran name mangling ........................................... 158&lt;br/&gt;C++ type encoding: types and scopes ............................................ 160&lt;br/&gt;Link-time type checking ................................................................ 163&lt;br/&gt;Weak external and other kinds of symbols ........................................ 164&lt;br/&gt;Maintaining debugging information .................................................. 164&lt;br/&gt;Line number information ............................................................... 164&lt;br/&gt;Symbol and variable information ................................................... 165&lt;br/&gt;Practical issues ............................................................................... 166&lt;br/&gt;Exercises ............................................................................................ 167&lt;br/&gt;Project ................................................................................................ 167&lt;br/&gt;Chapter 6: Libraries ........................................................... 169&lt;br/&gt;Purpose of libraries ............................................................................ 169&lt;br/&gt;Library formats .................................................................................. 169&lt;br/&gt;Using the operating system ............................................................ 169&lt;br/&gt;Unix and Windows Archive files ................................................... 170&lt;br/&gt;Unix archives ............................................................................. 170&lt;br/&gt;Extension to 64 bits ........................................................................ 174&lt;br/&gt;Intel OMF libraries ........................................................................ 174&lt;br/&gt;Creating libraries ................................................................................ 176&lt;br/&gt;Searching libraries ............................................................................. 177&lt;br/&gt;Table of Contents 5&lt;br/&gt;Performance issues ............................................................................. 179&lt;br/&gt;Weak external symbols ...................................................................... 179&lt;br/&gt;Exercises ............................................................................................ 181&lt;br/&gt;Project ................................................................................................ 181&lt;br/&gt;Chapter 7: Relocation ......................................................... 183&lt;br/&gt;Hardware and software relocation ..................................................... 183&lt;br/&gt;Link time and load time relocation .................................................... 184&lt;br/&gt;Symbol and segment relocation ......................................................... 185&lt;br/&gt;Symbol lookups ............................................................................. 186&lt;br/&gt;Basic relocation techniques ................................................................ 186&lt;br/&gt;Instruction relocation ..................................................................... 188&lt;br/&gt;X86 instruction relocation .......................................................... 189&lt;br/&gt;SPARC instruction relocation .................................................... 189&lt;br/&gt;ECOFF segment relocation ............................................................ 191&lt;br/&gt;ELF relocation ............................................................................... 193&lt;br/&gt;OMF relocation .............................................................................. 193&lt;br/&gt;Relinkable and relocatable output formats ........................................ 194&lt;br/&gt;Other relocation formats .................................................................... 194&lt;br/&gt;Chained references ......................................................................... 195&lt;br/&gt;Bit maps ......................................................................................... 195&lt;br/&gt;Special segments ............................................................................ 196&lt;br/&gt;Relocation special cases ..................................................................... 197&lt;br/&gt;Exercises ............................................................................................ 197&lt;br/&gt;Project ................................................................................................ 198&lt;br/&gt;Chapter 8: Loading and overlays ...................................... 201&lt;br/&gt;Basic loading ...................................................................................... 201&lt;br/&gt;Basic loading, with relocation ............................................................ 202&lt;br/&gt;Position-independent code ................................................................. 203&lt;br/&gt;TSS/360 position independent code ............................................... 203&lt;br/&gt;Per-routine pointer tables ............................................................... 206&lt;br/&gt;Table of Contents ........................................................................... 207&lt;br/&gt;ELF position independent code ..................................................... 208&lt;br/&gt;6 Table of Contents&lt;br/&gt;PIC costs and benefits .................................................................... 212&lt;br/&gt;Bootstrap loading ............................................................................... 213&lt;br/&gt;Tree structured overlays ..................................................................... 214&lt;br/&gt;Defining overlays ........................................................................... 217&lt;br/&gt;Implementation of overlays ........................................................... 220&lt;br/&gt;Overlay fine points ......................................................................... 222&lt;br/&gt;Data ............................................................................................ 222&lt;br/&gt;Duplicated code ......................................................................... 222&lt;br/&gt;Multiple regions ......................................................................... 223&lt;br/&gt;Overlay summary ........................................................................... 223&lt;br/&gt;Exercises ............................................................................................ 223&lt;br/&gt;Project ................................................................................................ 224&lt;br/&gt;Chapter 9: Shared libraries ............................................... 227&lt;br/&gt;Binding time ...................................................................................... 230&lt;br/&gt;Shared libraries in practice ................................................................. 231&lt;br/&gt;Address space management ............................................................... 231&lt;br/&gt;Structure of shared libraries ............................................................... 232&lt;br/&gt;Creating shared libraries .................................................................... 233&lt;br/&gt;Creating the jump table .................................................................. 234&lt;br/&gt;Creating the shared library ............................................................. 235&lt;br/&gt;Creating the stub library ................................................................. 235&lt;br/&gt;Version naming .............................................................................. 237&lt;br/&gt;Linking with shared libraries ............................................................. 238&lt;br/&gt;Running with shared libraries ............................................................ 238&lt;br/&gt;The malloc hack, and other shared library problems ......................... 240&lt;br/&gt;Exercises ............................................................................................ 243&lt;br/&gt;Project ................................................................................................ 244&lt;br/&gt;Chapter 10: Dynamic Linking and Loading .................... 247&lt;br/&gt;ELF dynamic linking ......................................................................... 248&lt;br/&gt;Contents of an ELF file ...................................................................... 248&lt;br/&gt;Loading a dynamically linked program ............................................. 253&lt;br/&gt;Starting the dynamic linker ............................................................ 253&lt;br/&gt;Table of Contents 7&lt;br/&gt;Finding the libraries ....................................................................... 254&lt;br/&gt;Shared library initialization ............................................................ 255&lt;br/&gt;Lazy procedure linkage with the PLT ................................................ 256&lt;br/&gt;Other peculiarities of dynamic linking .............................................. 258&lt;br/&gt;Static initializations ........................................................................ 258&lt;br/&gt;Library versions ............................................................................. 259&lt;br/&gt;Dynamic loading at runtime ............................................................... 260&lt;br/&gt;Microsoft Dynamic Link Libraries .................................................... 260&lt;br/&gt;Imported and exported symbols in PE files ................................... 261&lt;br/&gt;Lazy binding .................................................................................. 266&lt;br/&gt;DLLs and threads ........................................................................... 267&lt;br/&gt;OSF/1 pseudo-static shared libraries ................................................. 267&lt;br/&gt;Making shared libraries fast ............................................................... 268&lt;br/&gt;Comparison of dynamic linking approaches ...................................... 270&lt;br/&gt;Exercises ............................................................................................ 271&lt;br/&gt;Project ................................................................................................ 271&lt;br/&gt;Chapter 11: Advanced techniques ..................................... 273&lt;br/&gt;Techniques for C++ ........................................................................... 273&lt;br/&gt;Trial linking .................................................................................... 274&lt;br/&gt;Duplicate code elimination ............................................................ 276&lt;br/&gt;Database approaches ...................................................................... 278&lt;br/&gt;Incremental linking and relinking ...................................................... 278&lt;br/&gt;Link time garbage collection ............................................................. 281&lt;br/&gt;Link time optimization ....................................................................... 282&lt;br/&gt;Link time code generation ................................................................. 284&lt;br/&gt;Link-time profiling and instrumentation ........................................ 284&lt;br/&gt;Link time assembler ....................................................................... 285&lt;br/&gt;Load time code generation ............................................................. 285&lt;br/&gt;The Java linking model ...................................................................... 287&lt;br/&gt;Loading Java classes ...................................................................... 288&lt;br/&gt;Exercises ............................................................................................ 290&lt;br/&gt;Project ................................................................................................ 291&lt;br/&gt;8 Table of Contents&lt;br/&gt;Chapter 12: References ...................................................... 293&lt;br/&gt;Perl books ....................................................................................... 295 </description><pubDate>2008-04-07 17:08:28</pubDate></item>
<item><title>现代处理器的核心技术与基本结构</title><link>http://www.netyi.net/training/5e4814ed-06e6-40e4-8fbe-6cdefafecff3</link><description>介绍计算机处理器设计的主流技术和基本结构， 包括：RISC、超级标量、超级流水线、VLIW、编译优化等。&lt;br/&gt;&lt;br/&gt;第一章 引论&lt;br/&gt;第二章 RISC技术&lt;br/&gt;第三章 超级标量技术&lt;br/&gt;第四章 超长指令字结构&lt;br/&gt;第五章 超级流水线技术&lt;br/&gt;第六章 优化编译&lt;br/&gt;第七章 流水线&lt;br/&gt;第八章 高速缓冲存储器&lt;br/&gt;第九章 模拟和性能评价&lt;br/&gt;第十章 推测式执行和多控制流并行&lt;br/&gt;</description><pubDate>2008-03-28 23:26:12</pubDate></item>
<item><title>数字逻辑多媒体演示与教学</title><link>http://www.netyi.net/training/a839771b-91fd-4f81-acef-465d15d1ccb4</link><description>多媒体演示主要目录：&lt;br/&gt;第一章：开关理论&lt;br/&gt;第二章：组合逻辑&lt;br/&gt;第三章：时序逻辑&lt;br/&gt;第四章：可编程逻辑器件&lt;br/&gt;第五章：系统编程技术&lt;br/&gt;第六章：数字系统&lt;br/&gt;共150多个flash演示，北京邮电大学制作</description><pubDate>2008-02-17 11:30:15</pubDate></item>
<item><title>三极管原理</title><link>http://www.netyi.net/training/90b33e02-c20e-40ef-837c-d9e3f003bca2</link><description>数字逻辑基础</description><pubDate>2008-02-13 19:06:00</pubDate></item>
<item><title>SOA概念、技术与设计（英文版）</title><link>http://www.netyi.net/training/52b8ac19-f9f5-4fd9-9ba4-0b361765a708</link><description>本书系统介绍SOA概念、技术与设计。全书共分五部分，分别介绍SOA与Web服务的基本原理，SOA与第二代Web服务规范扩展，SOA与面向服务，构建SOA的计划与分析、技术与设计。本书由浅人深，示例翔实，应用大量模式，真正覆盖SOA实质部分。每章配有要点小结，使渎者能更深入理解该章主题。&lt;br/&gt;本书适合于考虑实施面向服务架构的软件开发者、架构师或项目经理阅读参考。...&lt;br/&gt;学习SOA的权威指南&lt;br/&gt;在世界范围所采用的革命性计算平台中，面向服务架构(SOA)处于核心位置，并赢得了主要软件供应商的普遍支持。本书是第一部端到端的SOA教程，逐步指导读者从零开始学习面向服务的建模与设计方法。本书通过125个案例研究、300多个模式，详细讲解和分析构建SOA平台的最重要方面：目标、障碍、概念、技术、标准、交付策略以及分析与设计过程。本书内容全面、清晰生动，可帮助读者深入理解SOA技术。.&lt;br/&gt;本书主要内容：&lt;br/&gt;●面向服务分析和设计的详细过程和步骤。&lt;br/&gt;●深度探索各种不同的面向服务设计模式，包括与面向对象的对比。&lt;br/&gt;●全面研究有关．NET与J2EE在开发及运行平台方面对SOA的支持。&lt;br/&gt;●一组关键Web服务技术与WS-*规范的描述，包括探索它们在SOA内如何关联和定位。..&lt;br/&gt;●“简言之”部分用通俗语言和实例，把复杂的概念简单化，更便于理解。&lt;br/&gt;●有关面向服务的业务建模以及创建特定服务抽象层的指导方针。&lt;br/&gt;●SOA与过去架构的对比，以及对当前行业的影响。&lt;br/&gt;●项目计划和各种SOA交付策略的比较。</description><pubDate>2008-01-10 13:44:27</pubDate></item>
<item><title>通信电路课件（通信工程专业）</title><link>http://www.netyi.net/training/4806d144-7459-48a8-ad9b-b7bad29dc65f</link><description>绪论&lt;br/&gt;功率电子线路&lt;br/&gt;谐振功率放大器&lt;br/&gt;正弦波振荡器&lt;br/&gt;振幅调制、解调与混频电路&lt;br/&gt;角度调制与解调电路&lt;br/&gt;反馈控制电路</description><pubDate>2008-01-09 00:51:08</pubDate></item>
<item><title>AT91系列ARM核微控制器结构与开发</title><link>http://www.netyi.net/training/7dd08ad3-81f4-4ec0-b5b5-1b3f46aa788c</link><description>本书针对ATMEL公司基于ARM核的AT91系列微控制器，介绍其器件的特点、内部结构、内部资源以及开发方法。全书共10章，包括AT91系列微控制器芯片结构原理、AT91评估板和集成函数库、ARM编程模型和指令集、内部资源的程序设计、硬件的开发平台和uClinux操作系统软件平台以及各种ARM开发工具等。AT91微控制器是ATMEL公司继AT89，AT90(AVR)系列单片机后，推出的基于国际领先32位RISC处理器核ARM的高端嵌入式系统芯片。它的特色是具有大容量Flash存储器的芯片，并提供C语言源码的丰富的AT91库函数。它是国内主流的ARM核芯片。 　　本书内容比较全面，编程举例详细，可作为嵌入式系统应用技术人员的参考手册和嵌入式系统课程的参考用书。</description><pubDate>2007-12-24 01:22:44</pubDate></item>
<item><title>閃存文件系統詳解</title><link>http://www.netyi.net/training/a4c0e6b8-d1bf-4e4a-b7cd-2b2fe5c62692</link><description>Flash File Systems Overview（内容）&lt;br/&gt;1.0 Overviw&lt;br/&gt;1.1 Flash Architecture&lt;br/&gt;1.1.1 Partitions&lt;br/&gt;1.1.2 Blocks&lt;br/&gt;1.2 Programming Data&lt;br/&gt;1.3 Data Integrity &lt;br/&gt;2.0 Flash File System Functions&lt;br/&gt;2.1 Wear Leveling&lt;br/&gt;2.2 Reclaim &lt;br/&gt;2.3 Read While Write &lt;br/&gt;2.4 Memory Array Management &lt;br/&gt;2.5 Code Management&lt;br/&gt;3.0 File System Architecture&lt;br/&gt;3.1 Architecture/Modular Design&lt;br/&gt;4.0 Reliability&lt;br/&gt;4.1 Power Loss Recovery&lt;br/&gt;4.2 Error Code Correction (ECC)&lt;br/&gt;4.3 Bad Block Management (NAND only) &lt;br/&gt;5.0 Flash File System Performance&lt;br/&gt;5.1 The Importance of Flash File System Performance &lt;br/&gt;6.0 Summary</description><pubDate>2007-12-24 01:13:37</pubDate></item>
<item><title>Arithmetic and Logic in Computer Systems</title><link>http://www.netyi.net/training/03c3df5b-da5d-4b32-9c26-09517d97c2fe</link><description>This book describes the fundamental principles of computer arithmetic. Algorithms&lt;br/&gt;for performing operations like addition, subtraction, multiplication and division in&lt;br/&gt;digital computer systems are presented. The goal is to explain the concepts behind&lt;br/&gt;the algorithms rather than to address any direct applications. Alternative methods are&lt;br/&gt;examined and various possibilities considered. With the rapid growth of VLSI technology,&lt;br/&gt;some currently unattractive algorithms may be implemented with remarkable&lt;br/&gt;performance in the future.&lt;br/&gt;This book can be used as a text of an introductory course for graduate students&lt;br/&gt;or senior undergraduate students in electrical engineering, and computer and mathematical&lt;br/&gt;sciences. It can also be used as a reference book for practicing engineers and&lt;br/&gt;computer scientists involved in the design, application and development of computer&lt;br/&gt;arithmetic units. For the number systems covered in Sections 1.4, 1.6 and 1.7, some&lt;br/&gt;exercise problems are listed in Chapters 9, 10 and 11 for in-depth study.&lt;br/&gt;I have been teaching a computer arithmetic course for fifteen years and have&lt;br/&gt;supervised Doctorate and Masters research projects in this area. As a preliminary&lt;br/&gt;version of the book, my lecture notes have received positive and constructive feedback&lt;br/&gt;over the years. An effort has been made to keep fundamental material self-contained&lt;br/&gt;and instructive rather than just referring readers to articles spread throughout the&lt;br/&gt;literature. The theories in the book have been carefully derived and the reasoning&lt;br/&gt;addressed as completely as possible. In addition to &amp;quot;it is so,&amp;quot; pointed to the readers&lt;br/&gt;is &amp;quot;why it is so.&amp;quot; The notation in different discussions is unified and the descriptions&lt;br/&gt;are given logically and with clarity. The whole presentation of the text is designed&lt;br/&gt;to be smooth and coherent rather than a collection of broken pieces, with leaps from&lt;br/&gt;one subject to another. I gratefully thank my father, Chong Pu Lu, and my husband,&lt;br/&gt;Jiming Yin, for their encouragement and support during the writing of this book. I&lt;br/&gt;also wish to acknowledge the contribution made by my graduate student, C. T. Chiang,&lt;br/&gt;for his assistance in graphical typesetting.&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;&lt;br/&gt;Contents&lt;br/&gt;&lt;br/&gt;Preface                                                      xiii&lt;br/&gt;List of Figures                                              xv&lt;br/&gt;List of Tables                                               xix&lt;br/&gt;About the Author                                             xxi&lt;br/&gt;1 Computer Number Systems                                    1&lt;br/&gt;  1.1Conventional Radix Number System                        2&lt;br/&gt;  1.2Conversion of Radix Numbers                             4&lt;br/&gt;  1.3Representation of Signed Numbers                        7&lt;br/&gt;    1.3.1 Sign-Magnitude                                     8&lt;br/&gt;    1.3.2 Diminished Radix Complement                        8&lt;br/&gt;    1.3.3 Radix Complement                                   8&lt;br/&gt;  1.4Signed-Digit Number System                              11&lt;br/&gt;  1.5Floating-point Number Representation                    15&lt;br/&gt;    1.5.1 Normalization                                      15&lt;br/&gt;    1.5.2 Bias                                               16&lt;br/&gt;  1.6Residue Number System                                   22&lt;br/&gt;  1.7Logarithmic Number System                               23&lt;br/&gt;    References                                               24&lt;br/&gt;    Problems                                                 26&lt;br/&gt;2 Addition and Subtraction                                   29&lt;br/&gt;  2.1 Single-Bit Adders                                      29&lt;br/&gt;    2.1.1 Logical Devices                                    29&lt;br/&gt;    2.1.2 Single-Bit Half-Adder and Full-Adders              32&lt;br/&gt;  2.2 Negation                                               35&lt;br/&gt;    2.2.1 Negation in One’s Complement System                36&lt;br/&gt;    2.2.2 Negation in Two’s Complement System                38&lt;br/&gt;  2.3 Subtraction through Addition                           40&lt;br/&gt;  2.4 Overjflow                                              43&lt;br/&gt;  2.5 Ripple Carry Adders                                    44&lt;br/&gt;    2.5.1 Two’s Complement Addition                          44&lt;br/&gt;    2.5.2 One’s Complement Addition                          46&lt;br/&gt;    2.5.3 Sign-Magnitude Addition                            48&lt;br/&gt;    References                                               50&lt;br/&gt;    Problems                                                 52&lt;br/&gt;3 High-speed Adder                                           53&lt;br/&gt;  3.1 Conditional-Sum Addition                               53&lt;br/&gt;  3.2 Carry-Completion Sensing Addition                      56&lt;br/&gt;  3.3 Carry-Lookahead Addition (CLA)                         61&lt;br/&gt;    3.3.1 Carry-Lookahead Adder                              61&lt;br/&gt;    3.3.2 Block Carry Lookahead Adder                        62&lt;br/&gt;  3.4 Carry-Save Adders (CSA)                                66&lt;br/&gt;  3.5 Bit-Partitioned Multiple Addition                      71&lt;br/&gt;    References                                               73&lt;br/&gt;    Problems                                                 74&lt;br/&gt;4 Sequential Multiplication                                  77&lt;br/&gt;  4.1 Add-and-shifl Approach                                 78&lt;br/&gt;  4.2 Indirect Multiplication Schemes                        81&lt;br/&gt;    4.2.1 Unsigned Number Multiplication                     81&lt;br/&gt;    4.2.2 Sign-Magnitude Number Multiplication               81&lt;br/&gt;    4.2.3 One’s Complement Number Multiplication             81&lt;br/&gt;    4.2.4 Two’s Complement Number Multiplication             85&lt;br/&gt;  4.3 Robertson ’s Signed Number Multiplication              87&lt;br/&gt;  4.4 Recoding Technique                                     89&lt;br/&gt;    4.4.1 Non-overlapped Multiple Bit Scanning               89&lt;br/&gt;    4.4.2 Overlapped Multiple Bit Scanning                   90&lt;br/&gt;    4.4.3 Booth’s Algorithm                                  93&lt;br/&gt;    4.4.4 Canonical Multiplier Recoding                      95&lt;br/&gt;    References                                               99&lt;br/&gt;    Problems                                                 100&lt;br/&gt;5 Parallel Multiplication                                    103&lt;br/&gt;  5.1 Wallace Trees                                          103&lt;br/&gt;  5.2 Unsigned Array Multiplier                              105&lt;br/&gt;  5.3 Two’s Complement Array Multiplier                      108&lt;br/&gt;    5.3.1 Baugh- Wooley Two s Complement Multiplier          111&lt;br/&gt;    5.3.2 Pezaris Two’s Complement Multipliers               117&lt;br/&gt;  5.4 Modular Structure of Large Multiplier                  120&lt;br/&gt;    5.4.1 Modular Structure                                  120&lt;br/&gt;    5.4.2 Additive Multiply Modules                          123&lt;br/&gt;    5.4.3 Programmable Multiply Modules                      125&lt;br/&gt;    References                                               130&lt;br/&gt;    Problems                                                 132&lt;br/&gt;6 Sequential Division                                        135&lt;br/&gt;  6.1 Subtract-and-Shifl Approach                            135&lt;br/&gt;  6.2 Binary Restoring Division                              138&lt;br/&gt;  6.3 Binary Non-Restoring Division                          141&lt;br/&gt;  6.4 High-Radix Division                                    144&lt;br/&gt;    6.4.1 High-Radix Non-Restoring Division                  144&lt;br/&gt;    6.4.2 SRT Division                                       146&lt;br/&gt;    6.4.3 Modified SRT Division                              147&lt;br/&gt;    6.4.4 Robertson’s High-Radix Division                    147&lt;br/&gt;  6.5 Convergence Division                                   150&lt;br/&gt;    6.5.1 Convergence Division Methodologies                 152&lt;br/&gt;    6.5.2 Divider Implementing Convergence Division          &lt;br/&gt;          Algorithm                                          155&lt;br/&gt;  6.6 Division by Divisor Reciprocation                      157&lt;br/&gt;    References                                               162&lt;br/&gt;    Problems                                                 164&lt;br/&gt;7 Fast Array Dividers                                        167&lt;br/&gt;  7.1 Restoring Cellular Array Divider                       167&lt;br/&gt;  7.2 Non-Restoring Cellular Array Divider                   171&lt;br/&gt;  7.3 Carry-Lookahead Cellular Array Divider                 173&lt;br/&gt;    References                                               180&lt;br/&gt;    Problems                                                 181&lt;br/&gt;8 Floating Point Operations                                  183&lt;br/&gt;  8.1 Floating Point AdditiodSubtraction                     183&lt;br/&gt;  8.2 Floating Point Multiplication                          184&lt;br/&gt;  8.3 Floating Point Division                                188&lt;br/&gt;  8.4 Rounding                                               189&lt;br/&gt;  8.5 Extra Bits                                             191&lt;br/&gt;    References                                               194&lt;br/&gt;    Problems                                                 196&lt;br/&gt;9 Residue Number Operations                                  199&lt;br/&gt;  9.1 RNS Addition, Subtraction and Multiplication           199&lt;br/&gt;  9.2 Number Comparison and Overflow Detection               200&lt;br/&gt;    9.2.1 Unsigned Number Comparison                         200&lt;br/&gt;    9.2.2 Overflow Detection                                 202&lt;br/&gt;    9.2.3 Signed Numbers and Their Properties                202&lt;br/&gt;    9.2.4 Multiplicative Inverse and the Parity Table        203&lt;br/&gt;9.3 Division Algorithm                                       206&lt;br/&gt;    9.3.1 Unsigned Number Division                           206&lt;br/&gt;    9.3.2 Signed Number Division                             209&lt;br/&gt;    9.3.3 Multiplicative Division Algorithm                  212&lt;br/&gt;    References                                               216&lt;br/&gt;    Problems                                                 218&lt;br/&gt;10 Operations through Logarithms                             221&lt;br/&gt;  10.1 Multiplication and Addition in Logarithmic Systems    221&lt;br/&gt;  10.2 Addition and Subtraction in Logarithmic Systems       222&lt;br/&gt;  10.3 Realizing the Approximation                           225&lt;br/&gt;    References                                               232&lt;br/&gt;    Problems                                                 233&lt;br/&gt;11 Signed-Digit Number Operations                            235&lt;br/&gt;  11.1 Characteristics of SD Numbers                         235&lt;br/&gt;  11.2 Totally Parallel AdditiodSubtraction                  236&lt;br/&gt;  11.3 Required and Allowed Values                           237&lt;br/&gt;  11.4 Multiplication and Division                           239&lt;br/&gt;    References                                               243&lt;br/&gt;    Problems                                                 244&lt;br/&gt;Index                                                        245</description><pubDate>2007-12-21 18:24:29</pubDate></item>
<item><title>Artificial Intelligence, A Modern Approach 人工智能：一种现代的方法 英文版</title><link>http://www.netyi.net/training/72bdcda3-e69b-499d-b7b3-1b01a07ed004</link><description>人工智能:一种现代方法Artificial Intelligence：A Modern Approach&lt;br/&gt;【作者】 Stuart J. Russell and Peter Norvig   &lt;br/&gt;【出版社】  Prentice Hall   &lt;br/&gt;【ISBN】  ISBN 0-13-103805-2   &lt;br/&gt;【资料语言】  英文   &lt;br/&gt;资料说明： &lt;br/&gt;本书以详尽和丰富的资料，从理性智能体的角度，全面阐述了人工智能领域的核心内容，并深入介绍了各个主要的研究方向，是一本难得的综合性教材。全书分为八大部分：第一部分&amp;quot;人工智能&amp;quot;，第二部分&amp;quot;问题求解&amp;quot;，第三部分&amp;quot;知识与推理&amp;quot;，第四部分&amp;quot;规划&amp;quot;，第五部分&amp;quot;不确定知识与推理&amp;quot;，第六部分&amp;quot;学习&amp;quot;，第七部分&amp;quot;通讯、感知与行动&amp;quot;，第八部分&amp;quot;结论&amp;quot;。 本书既详细介绍了大量的基本概念、思想和算法，也描述了各研究方向最前沿的进展，同时收集整理了详实的历史文献与事件。因此本书适合于不同层次和领域的研究人员及学生，可以作为信息领域和相关领域的高等院校本科生和研究生的教材或教学辅导书目，也可以作为相关领域的科研与工程技术人员的参考书。  &lt;br/&gt;人工智能的一本好书，推荐英文版&lt;br/&gt;</description><pubDate>2007-12-10 13:50:21</pubDate></item>
<item><title>Applied Analytics Using SAS Enterprise Miner 5</title><link>http://www.netyi.net/training/50aa07a3-b4ea-4a45-99c7-b77f696b94c9</link><description>经典的SAS Course Notes, SAS 内部的资料&lt;br/&gt;Applied Analytics Using SAS? Enterprise Miner? 5 Course Notes was developed by Jim Georges.Additional contributions were made by Tom Bohannon, Mike Hardin, Dan Kelly, Bob Lucas, and Sue Walsh. Editing and production support was provided by the Curriculum Development and Support Department.</description><pubDate>2007-12-07 14:33:26</pubDate></item>
<item><title>自动控制原理课件</title><link>http://www.netyi.net/training/d63c66a5-a4a2-4f49-81be-0f3da7be7db4</link><description>第1章   预备知识.&lt;br/&gt;第2章    微型计算机组成与原理 &lt;br/&gt;第3章   指令系统及汇编语言程序设计&lt;br/&gt;第4章   半导体存贮器&lt;br/&gt;第5章   输入输出技术&lt;br/&gt;第6章   常用的输入输出接口芯片&lt;br/&gt;第7章   Pentium简介&lt;br/&gt;第8章   系统设计与开发&lt;br/&gt;&lt;br/&gt;</description><pubDate>2007-11-09 07:26:32</pubDate></item>
<item><title>Computer Organization and Design, The hardware/sofeware interface Third Edition.pdf</title><link>http://www.netyi.net/training/a8ef8ae1-f9d5-45e6-b87c-31219896c385</link><description>The performance of software systems is dramatically affected by how well software designers understand the basic hardware technologies at work in a system. Similarly, hardware designers must understand the far-reaching effects their design decisions have on software applications. For reade, rs in either category, this classic introduction to the field provides a look deep into the computer. It demonstrates the relationships between the software and hardware and focuses on the foundational concepts that are the basis for current computer design. As with previous editions, a MIPS processor is the core used to present the fundamentals of hardware technologies at work in a computer system. The book presents an entire MIPS instruction sot--instruction by instruction--the fundamentals of assembly language, computer arithmetic, pipelimng, memory hierarchies, and I/O, and introduces the essentials of network and multiprocessor architectures. A new aspect of the third edition is the explicit connection between program performance and CPU performance. The authors show how hardware and software eomponents--such as the specific algorithm, programming language, compiler, instruction set architecture, and processor implementation--impact program performance. This edition also digs deeper into related hardware and software issues, offering specific material on the CD for readers with a hardware or software focus. A CD provides a toolkit of simulators and compilers along with tutorials for using them. FEATURES ■Entire text has been updated to reflect new technology ■Uses standard 32-bit MIPS 32 as the primary teaching ISA ■Highlights the latest developments in architecture &amp;#183;Intel IA-32 &amp;#183;Power PC 604 &amp;#183;Pentium P4 &amp;#183;Google's PC cluster &amp;#183;SPEC CPU2000 benchmark suite for processors &amp;#183;SPEC Web99 benchmark for web &amp;#183;EEMBC benchmark for embedded systems &amp;#183;AMD Opteron memory hierarchy &amp;#183;AMD vs. lA-64 &amp;#183;Intrinsity's FastMATH processor servers ■New material for a Hardware Focus &amp;#183;Using logic design conventions &amp;#183;Designing with hardware description languages &amp;#183;Advanced pipelining &amp;#183;Designing with FPGAs &amp;#183;HDL simulators and tutorials &amp;#183;Xitinx CAD tools ■New material for a Software Focus &amp;#183;How compilers work &amp;#183;How to optimize compilers &amp;#183;How to implement object oriented languages &amp;#183;History sections on programming languages,compilers, operating systems, and databases Also by the same authors: Computer Architecture.' A Quantitative Approach, Third Edition, the classic reference for computer systems analysis and design. Computer Systems Design Computer Hardware </description><pubDate>2007-10-16 08:36:12</pubDate></item>
<item><title>Readings in Computer Architecture (计算机体系结构56篇经典论文)</title><link>http://www.netyi.net/training/3536d4f9-5b63-420c-ba5d-616d40c36e76</link><description>This is much more than a simple collection of papers. The editors have carefully selected the most influential primary sources in specific areas of inquiry that, taken together, present the critical issues of the entire discipline. These include issues in technology, implementation, economics, evaluation methods, instruction set design, instruction level parallelism, dataflow/multithreading, memory systems, input/output systems, single-instruction multiple data parallelism, and multiple-instruction multiple data parallelism. In addition, you'll find the editors' thoughtful, focused introductions to each area, providing the context and background necessary for understanding the significance and lasting impact of these papers.&lt;br/&gt;&lt;br/&gt;The primary sources and insightful commentary contained in this book provide foundational knowledge for computer architects as well as for those who design supporting system software and compilers. This is an excellent resource for practitioners, instructors, students, and researchers. &lt;br/&gt;&lt;br/&gt;* Includes more than 50+ influential papers spanning four decades of computer architecture research and development&lt;br/&gt;&lt;br/&gt;* Selected, edited, and introduced by three eminent researchers and educators in the field.&lt;br/&gt;&lt;br/&gt;* Demonstrates the value of primary sources by showing how forgotten design ideas of the past are often rediscovered when new needs or constraints emerge.&lt;br/&gt;&lt;br/&gt;* Accompanied by an annually updated companion Web site with links and references to recently published papers, providing a forum for the editors to comment on how recent work continues or breaks with previous work in the field. &lt;br/&gt;</description><pubDate>2007-10-15 12:33:51</pubDate></item>
<item><title>复旦大学微机原理课件</title><link>http://www.netyi.net/training/0d8caf97-9ecb-443a-9d60-7df1390afb57</link><description>内容包括：&lt;br/&gt;第一章  8086程序设计&lt;br/&gt;第二章  MCS-51程序设计&lt;br/&gt;第三章  微机基本系统的设计&lt;br/&gt;第四章  存贮器与接口&lt;br/&gt;第五章  并行接口&lt;br/&gt;第六章  计数器、定时器与接口&lt;br/&gt;第七章  显示器与键盘接口&lt;br/&gt;第八章  串行通信及接口&lt;br/&gt;第九章  数模转换器和模数转换器接口&lt;br/&gt;</description><pubDate>2007-09-23 21:13:09</pubDate></item>
<item><title>Computer Architecture. A Quantitative Approach [ 计算机系统结构：一种定量的方法（第二版）]</title><link>http://www.netyi.net/training/f4c92cc7-1188-4b8b-bc57-e08f09d9bda0</link><description>【内容简介】&lt;br/&gt;本书系统而全面地介绍了计算机系统的设计基础、指令机体系结构、流水线和指令级并行技术、层次存储系统与存储设备、互连网络以及多处理器系统等重要内容。对计算机系统结构的论述主要以RISC结构模型机DLX为基础，通过定量分析的方法进行。本书内容丰富全面，既介绍了当今计算机系统结构的最新研究成果，也引述了有影响的计算机系统设计开发方面的大量实践经验。全书编排层次 合理，叙述由浅人深。各章结尾还附有大量的习题和参考文献。 本书既可以作为高等院校计算机专业高年级学生和研究生学习“计算机系统结构”、“计算机原理”等课程的教科书或参考书，也可供与计算机相关的专业科技人员学习参考。</description><pubDate>2007-09-15 13:01:41</pubDate></item>
<item><title>ooad</title><link>http://www.netyi.net/training/bb3dd42a-6381-47b9-a66e-492a1c6dcec3</link><description /><pubDate>2007-07-20 14:07:00</pubDate></item>
<item><title>MS-DOS常用命令基础视频教程</title><link>http://www.netyi.net/training/cefeb65b-2cc5-4bf4-8f6b-9ad23e889a56</link><description>包括对copy,dir，format,ren,tasklist,ping,net user,net use,at,md……等20余个常用命令的视频详解</description><pubDate>2007-07-15 08:42:46</pubDate></item>
<item><title>并行计算机体系结构：硬件/软件结合的设计与分析</title><link>http://www.netyi.net/training/85651091-68bf-44f8-8fcf-5006ff791416</link><description>本书共有12章。第1章给出了并行体系结构的一个概貌。第2章介绍了并行程序设计。描述了一组具有启发性的多处理器系统应用的例子，在本书的其他部分也将用到它们。第3章给出了好的并行程序设计人员用于从底层体系结构中改进性能的基本技术。第4章讨论了在进行设计权衡时采用工作负载驱动评估方法的难题。第5、6章是关于基于总线的对称共享存储多处理器(SMP)的一个完整介绍。 第7章展现了一类机器的硬件组织和体系结构，它们能够扩展到很大的配置。第8章将前面几章的结果综合起来，展现了如何在可扩展系统上通过自动硬件复制和高速缓存一致性，来实现一个共享的物理地址空间。第9章考察了针对共享地址空间系统的一系列备选方案，它们扩展了硬件／软件权衡的边界以获得更高的性能，降低硬件的成本和复杂性，或两者兼得。第10章讨论可扩展的高性能通信网络的设计。第11章考察了一组交叉问题，它们涉及如何包容多处理器系统中出现的显著的时延而不至于影响总体性能。最后，第12章考察了那些有可能决定这个领域未来的技术、体系结构、软件系统和应用方面的发展趋势。 </description><pubDate>2007-07-12 18:12:26</pubDate></item>
<item><title>Applying UML and Patterns: An Introduction to Object-Oriented Analysis and Design and Iterative Deve</title><link>http://www.netyi.net/training/a7125bb0-28aa-4330-bc73-e6336902616e</link><description>Applying UML and Patterns is the world's #1 business and college introduction to &amp;quot;thinking in objects&amp;quot;and using that insight in real-world object-oriented analysis and design. Building on two widely acclaimed previous editions, Craig Larman has updated this book to fully reflect the new UML 2 standard, to help you master the art of object design, and to promote high-impact, iterative, and skillful agile modeling practices.&lt;br/&gt;&lt;br/&gt;Developers and students will learn object-oriented analysis and design (OOA/D) through three iterations of two cohesive, start-to-finish case studies. These case studies incrementally introduce key skills, essential OO principles and patterns, UML notation, and best practices. You won't just learn UML diagramsyou'll learn how to apply UML in the context of OO software development.&lt;br/&gt;&lt;br/&gt;Drawing on his unsurpassed experience as a mentor and consultant, Larman helps you understand evolutionary requirements and use cases, domain object modeling, responsibility-driven design, essential OO design, layered architectures, &amp;quot;Gang of Four&amp;quot; design patterns, GRASP, iterative methods, an agile approach to the Unified Process (UP), and much more. This edition's extensive improvements include&lt;br/&gt;&lt;br/&gt;A stronger focus on helping you master OOA/D through case studies that demonstrate key OO principles and patterns, while also applying the UML&lt;br/&gt;&lt;br/&gt;New coverage of UML 2, Agile Modeling, Test-Driven Development, and refactoring&lt;br/&gt;&lt;br/&gt;Many new tips on combining iterative and evolutionary development with OOA/D&lt;br/&gt;&lt;br/&gt;Updates for easier study, including new learning aids and graphics&lt;br/&gt;&lt;br/&gt;New college educator teaching resources&lt;br/&gt;&lt;br/&gt;Guidance on applying the UP in a light, agile spirit, complementary with other iterative methods such as XP and Scrum&lt;br/&gt;&lt;br/&gt;Techniques for applying the UML to documenting architectures&lt;br/&gt;&lt;br/&gt;A new chapter on evolutionary requirements, and much more&lt;br/&gt;&lt;br/&gt;</description><pubDate>2007-06-19 09:41:12</pubDate></item>
<item><title>JSP应用实例.ppt</title><link>http://www.netyi.net/training/10455b35-51ea-48b1-8ada-794120a702a4</link><description>基于B/B的网上图书采购系统的部分模块</description><pubDate>2007-06-18 10:08:33</pubDate></item>
<item><title>美国的Human Computer Interaction (HCI)课件</title><link>http://www.netyi.net/training/f2e18c47-c617-421d-a345-9279d9ff4133</link><description>学HCI或UI DESIGN的很有帮助,是PPT</description><pubDate>2007-05-30 03:23:25</pubDate></item>
<item><title>ARM中文指令</title><link>http://www.netyi.net/training/f130eb4f-30db-481d-8565-efb0958db469</link><description>绝对好的arm原版指令中文翻译！！！！pdf格式！！！</description><pubDate>2007-05-22 10:56:20</pubDate></item>
<item><title>车牌自动识别中的字符特征提取方法</title><link>http://www.netyi.net/training/0c6c6856-5452-4cc3-ae19-a12280ced9dc</link><description>车牌自动识别中的字符特征提取方法</description><pubDate>2007-05-21 18:09:25</pubDate></item>
<item><title>基于图论分析的车牌数字字符识别研究与应用</title><link>http://www.netyi.net/training/4e448039-546c-41c0-890e-74d4e5ad04a6</link><description>基于图论分析的车牌数字字符识别研究与应用</description><pubDate>2007-05-21 18:05:42</pubDate></item>
<item><title>A-LIST.Code.Optimization.Effective.Memory.Usage.chm</title><link>http://www.netyi.net/training/7d94093f-c1ba-4801-93af-f047c07c9aa4</link><description>Code Optimization: Effective Memory Usage</description><pubDate>2007-05-21 11:25:01</pubDate></item>
<item><title>arm vic 向量中断控制器详述</title><link>http://www.netyi.net/training/a6eec5ac-90ac-48df-afad-a2bb6033fd54</link><description>学习arm关键技术的重要文献！！！vic的详细论述！！！</description><pubDate>2007-05-21 09:38:52</pubDate></item>
</channel></rss>